Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - verilog RAM

Search list

[Other] allidt_20020616.tar

Description: idt的双口ram的读写接口程序，verilog 代码，并且有测试文档-Employing a dual-port ram reader interface program, Verilog code, and a test document
Platform: | Size: 45056 | Author: | Hits:

[VHDL-FPGA-Verilog] frame_decode_and_encode

Description: 一个用Verilog编写的编帧、解帧及码速匹配的程序，相当经典-Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!
Platform: | Size: 3072 | Author: 李全 | Hits:

[VHDL-FPGA-Verilog] sram

Description: sram 读写小程序，用verilog编写的，请各位高手指教-SRAM read and write small programs using Verilog prepared, please enlighten you master
Platform: | Size: 1024 | Author: kevin | Hits:

[Special Effects] videofram

Description: 用CPLD控制图像卡进行帧存逻辑的verilog程序,用Quartus II 5.0打开-with CPLD control image frame buffer cards logical verilog procedures, Quartus II 5.0 Open
Platform: | Size: 1024 | Author: 陈刚峰 | Hits:

[VHDL-FPGA-Verilog] CommandResponse

Description: verilog语言写的sdram控制器—命令响应模块代码，经过测试，逻辑正确，可编译，可综合-verilog language written sdram controller-order response to the code, tested, logically correct, compiler, integrated
Platform: | Size: 1024 | Author: hanjian | Hits:

[VHDL-FPGA-Verilog] control_interface

Description: SDRAM控制器Verilog员代码，控制接口模块，完成和顶层模块的控制命令的传递-SDRAM controller member Verilog code control interface module, Top module and complete the transfer of control orders
Platform: | Size: 3072 | Author: 陈建勇 | Hits:

[Other Embeded program] epp_sram

Description: verilog语言编写的FPGA代码。功能为pc机通过epp不断写数到sram中，然后pc发送中断信号打断写过程读取sram中的数据。rar包中包含epp协议，模块文件和测试文件（test）。-Verilog FPGA code languages. Pc machine functions through a number of epp constantly write to the SRAM, and then pc send interrupt signals to interrupt the process of writing to read the data in the SRAM. rar package includes epp agreement, modules and test documents (test).
Platform: | Size: 43008 | Author: 苗苗 | Hits:

[VHDL-FPGA-Verilog] Sdram_Control_4Port

Description: ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。-ALTERA on the operation of the SDRAM controller Verilog procedures, it is definitely worth a good draw.
Platform: | Size: 13312 | Author: 邹振兴 | Hits:

[VHDL-FPGA-Verilog] ddr_ctrl

Description: verilog hdl coding DDR sdram control for fpga -verilog hdl coding DDR sdram control for fpga
Platform: | Size: 27648 | Author: 王郁 | Hits:

[VHDL-FPGA-Verilog] altera_ram

Description: 本程序对如何使用altera系列芯片片上ram进行实例演示，采用Verilog HDL语言编写，并使用modelsim与quartus联合进行功能仿真。本原码是红色逻辑开发板的试验程序，值得一看。-This procedure of how to use the altera series chip-chip ram for example demonstration, using Verilog HDL language, and using ModelSim and Quartus functional simulation carried out jointly. Primitive code is red logic development board of the pilot program, worth a visit.
Platform: | Size: 180224 | Author: panyouyu | Hits:

[VHDL-FPGA-Verilog] rom

Description: Read-only memory,Verilog code
Platform: | Size: 8192 | Author: leigh lee | Hits:

[Other Embeded program] ip

Description: usart的verilog代码.rar 包括很多的FPGA ip 源码，可以直接应用 uart_vhdl.zip sl811usb包含源程序.rar mc8051_design.zip mcpu_1[1].05.zip minicpu.zip mmc_lark_original.zip -USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
Platform: | Size: 5391360 | Author: 钟阳 | Hits:

[VHDL-FPGA-Verilog] Synchronous_read_write_RAM

Description: Synchronous read write RAM verilog。经过modelsim se仿真。-Synchronous read write RAM verilog. Through simulation modelsim se.
Platform: | Size: 1024 | Author: lianlianmao | Hits:

[VHDL-FPGA-Verilog] dul_ram(yk)

Description: 关于双口RAM的Verilog HDL源码-On the dual-port RAM in Verilog HDL source
Platform: | Size: 3072 | Author: 123 | Hits:

[VHDL-FPGA-Verilog] Verilog_FIFO_ram

Description: 一个可以综合的Verilog 写的FIFO存储器，word格式-An integrated Verilog wrote FIFO memory, word format
Platform: | Size: 19456 | Author: hjx | Hits:

[VHDL-FPGA-Verilog] 62256

Description: EPM1270和ram62256的verilog接口程序，用QuartusII编译
Platform: | Size: 323584 | Author: 汉武帝 | Hits:

[VHDL-FPGA-Verilog] Dual_port_RAM

Description: Verilog语言实现的算端口模块（Dual_port_ram)-Verilog language operators realize the port module (Dual_port_ram)
Platform: | Size: 1024 | Author: zhan | Hits:

[VHDL-FPGA-Verilog] 8051-Verilog

Description: 使用CPLD仿真8051核,内有源程序和说明,来之不易-CPLD simulation using 8051 nuclear, which has source code and description, the hard-won
Platform: | Size: 90112 | Author: 梁志洪 | Hits:

[VHDL-FPGA-Verilog] sram_control

Description: verilog编写fpga与片外SRAM通信模块-Verilog FPGA with the preparation of SRAM chip communication module
Platform: | Size: 418816 | Author: 宇天 | Hits:

[VHDL-FPGA-Verilog] ram_of_Fusion

Description: Fusion中的双口RAM编写，可以实现双向的调用。用Verilog编写。-Fusion in the preparation of dual-port RAM, you can realize a two-way call. Prepared using Verilog.
Platform: | Size: 4096 | Author: Nila | Hits:
« 1 23 4 5 6 7 8 9 10 »

CodeBus www.codebus.net